DEsc<x>riptION OF DUTIES IN ADDITION TO THOSE IN JOB DEsc<x>riptION:
- Display IP verification and Display chip verification for various PC products to deliver state
of art display technology.
- Work with chip teams to create a verification depot for Display IP development;
- Improve test plans or methodology for Display IP test benches suitable for product
requirements;
- Carry out integration from Display IP depot to chip depot to facilitate Display IP delivery.
PREFERRED EXPERIENCE:
- Must Master degree, major in Micro-Electronics(ME) or Electrical Engineering (EE)
- At least 3 years of proven verification experience on large ASIC development projects
- Strong background in C/C++
- Experience with Verilog
- Experience working with Cadence NCSIM, Synopsys VCS or equivalent
- Working knowledge of Perl sc<x>ripting and Makefiles
Working knowledge of UNIX/Linux operating systems and debugging tools
- Interest in developing custom verification tools and driving new test methodologies
- Strong analytical skills and attention to detail
- Excellent written and communication skills
- Team player
- Display and Video/Mutimedia experience an asset
