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 没事找事系列：Dr. Susan Xiao-Ping Su美国三谷大学校长的简历，very impressive（转帖） |
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安普若
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头衔: 海归元勋
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加入时间: 2004/02/21
文章: 26038
来自: 中国美国的飞机上
海归分: 4196257
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作者：安普若 在 海归茶馆 发贴, 来自【海归网】 http://www.haiguinet.com
Dr. Susan Xiao-Ping Su
President of Tri-Valley University
Tri-Valley University TVU
E-mail: [email protected], [email protected]
EDUCATION
Ph .D. Department of Mechanical Engineering, University of California at Berkeley, 2001.
Major: Design; Minor I: Microscale Heat Transfer; Minor II: Integrated Circuit Technology.
Dissertation: Compliant Microleverage Mechanism Design for MEMS Application
Dissertation Advisors: Prof. Alice M. Agogino; Prof. Tsu-Jae King, Prof. Dennise K. Lieu
M. S. Department of Mechanical and Aeronautical Engineering, University of California at Davis, 1997. Major: Design
Thesis: Computer-Aided Kinematic and Dynamic Analysis of Spatial Mechanisms
Thesis Advisors: Prof. Harry H. Cheng; Prof. Bahram Ravani; Prof. An T. Yang (Emeritus)
B. S. Department of Engineering Mechanics, Tsinghua University, China, 1991.
Major Field of Study: Fluid Mechanics
WORK EXPERIENCE
1. President and Founder, Semiconductor System Integration, Pleasanton, 2003-present
• Consultant for Phosistor Technology, Pleasanton, on Semiconductor Device Fabrication, Development of photonic component (laser and OPM) process, Oxford Plasmalab DRIE and ICP etching of SiO2 for Optical MEMS devices.
• Consultant for California Micro Device on Chip-Scale-Packaging strengthen mechanism;
• Consultant for NASA on nano chemical sensor fabrication.
• High-density Magnetic Random Access Memory Development
2. Lecturer, HerGuan University, Sunnyvale, 2007
EE537 Analog IC Design, EE515 & 516 VLSI I & II
3. Lecturer, San Jose State University, San Jose, CA, Fall 2004-2006
EE178 Digital System Design with FPGA, ME 101 Dynamic
4. Lecturer, San Francisco State University, San Francisco, CA, 2004-2005;
ENGR 890 Design of MEMS; Design of CMOS Memory Circuit
ENGR 356 Computer Architecture; ENGR378 Digital System Design with Verilog.
5. Lecturer, International Technological University, Santa Clara, CA, 2004-2007
EEN967 Analog IC Design; EE 519 CMOS Memory Circuit Design; EE 511 VlSI I, II;
EEN 923 & 910 Semiconductor Physics & Devices; EEN 918 IC Fabrication Technology.
6. Lecturer, Northwestern Polytechnic University, Fremont, CA, 9/2002 -2004
EE 507 Analog IC Design; EE 520 CMOS Memory Circuit Design;
EE 506 VLSI II; EE 624 IC Fabrication Technology; EE 581 MEMS/NEMS Design;
Developing MEMS and nanotechnology concentration area curriculum.
7. Member of Technical Staff, Project manager, PicoNetics Inc., Fremont, 9/2000-9/2002.
• 256K 100MHz (TSMC 0.25m) and 4M 200MHz SRAM design (0.13m G logic process); RLC circuit for on-chip sin wave generation, sense amplifier fro SRAM, DRAM, Bandgap reference, voltage regulator, PLL circuit design, standard cell library design.
• Supervision of two layout engineers for a 256K SRAM circuit including all technical file set-up, layout optimization for minimum coupling and RC delay, Dracula LVS and Arcadia extraction, LVS and Extraction tools evaluation and memory compliers; UMC and TSMC 0.25, 0.18, 0.15 and 0.13 m process evaluation for SRAM.
8. Graduate Researcher, Berkeley Sensor and Actuator Center (BSAC), and Berkeley Expert Technology System Lab (BEST), U. C. Berkeley, 1996-2000.
• Design, fabrication and testing of a resonant accelerometer (RXL) with on-chip amplifier and two-stage leverage mechanism by the SOI-MEMS integrated process.
• Compliant micro-leverage mechanism design and analysis, FEM analysis and simulation with ABAQUS and SUGAR; Design of the mechanism for force and displacement amplification in other MEMS devices including a micro-valve, an electrostatic actuator and the suspension of the disk drive.
9. Internship, Lawrence Berkeley National Lab, EETD, 6/1999-12/1999.
• Optics programming; SEM and TEM measurements of glass samples.
10. Graduate Researcher, Integrated Engineering and Mechatronics Lab, Dept. of Mechanical and Aeronautical Engineering, UC Davis, 1994-1996
• With Ch program, analysis of velocity and acceleration for 32 spatial mechanisms (4-bar, 5-bar, 6-bar and 7-bar); force and torque analysis of RCCC & RCRCR mechanisms;
• Designed a data acquisition system for PAS machine by communication of an AT-MIO-16F board in Labview.
GRADUATE THESIS ADVISING:
• Yaosong Tao, International Technological University, Ph.D. Thesis: RF MEMS Components for Communication Systems, 2004.
• Leo Huang, Northwestern Polytechnic University, M.S. Thesis, Contacting Printing Lithography for Polymeric Organic Light-Emitting Diode, 2005;
• Sam Shi, International Technological University, M.S. Thesis, A 8-bit Energy Recover Adder, 2005;
• Parthiv Pandya, International Technological University, M.S. Thesis: MRAM Core Cell Design and Optimization, 2004;
• Paisit Sriprataks, International Technological University, M.S. Thesis: MRAM Sensing Circuit Design, 2004;
• Balajee Premraj, International Technological University, M.S. Thesis: Design of an 8M MRAM, 2004;
• Raul Gali, Northwestern Polytechnic University, M.S. Thesis: Signal Process Circuit Design for a Resonant Accelerometer, 2003;
AWARDS and HONORS
• John H. Latoures Scholarship, Mechanical Engineering Department,U.C. Berkeley, 2001.
• Lankershim Awards, U.C. Berkeley, 2000
• National Science Foundation (NSF) Graduate Research Fellowship (1996-1999);
• American Associated University Woman (AAUW) Selected Professional Fellowship ,1995;
• University Fee Grant, UC Davis, 1994.
PUBLICATIONS
1. S. X. P. Su, H. S. Yang, Alice M Agogino, Resonant Accelerometer with a Two-Stage Microleverage Mechanism Fabricated by SOI-MEMS Technology, IEEE Sensors Journal, Vol.5, No.6 December 2005, p.1214-1223
2. An Sang Hou, Susan X. P. Su, Design of a Capacitive-Sensor Signal Processing System with High Accuracy and Short Conversion Time, Sensors and Actuators A: Physical, Volume 119, Issue 1, 28 March 2005, P.113-119
3. X-P S. Su, H. S. Yang, Analytical Modeling and FEM Simulation of Single-Stage Microleverage Mechanism, International Journal of Mechanical Sciences 44, 2217-2238, 2002.
4. X-P. S. Su, H. S. Yang, Two-Stage Microleverage Mechanism Optimization in a Resonant Accelerometer, Structural and Multidisciplinary Optimization 22, 328-336, 2002.
5. X-P S. Su, H. S. Yang, Design of Compliant Microleverage Mechanism, Sensors and Actuators, A 87 146-156, 2001.
6. X-P S. Su, H. S. Yang, Single-Stage Microleverage Mechanism Optimization in a Resonant Accelerometer, Structural and Multidisciplinary Optimization 21, 246-252, 2001
7. H. S. Yang, X-P S. Su and B. Bai, Strain Analysis in Uniaxial Tensile and Compression Testing of Anisotropic Materials, International Journal of Mechanical Sciences 42 (2000) 2395-2415.
PATENTS
1. Susan X. P. Su, “A Folded-MTJ MRAM Cell” U.S. Patent No. US60/994941, 2007
作者：安普若 在 海归茶馆 发贴, 来自【海归网】 http://www.haiguinet.com
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 没事找事系列：Dr. Susan Xiao-Ping Su美国三谷大学校长的简历，very impressive（转帖） -- 安普若 - (6844 Byte) 2011-5-12 周四, 23:41 (5681 reads)
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